NVMe backplane
Hot-swap U.2, E1.S, and E3.S bays with PCI Express fan-out to the host.
In Development
Build-A-Board
Custom server boards for a purpose-built AI machine.
Hardware design for the AI of tomorrow.
The Meta Groupe is building its own server hardware. Build-A-Board is an in-house family of server boards for a purpose-built AI system. The machine our research needs is not a configuration any vendor sells, and assembling it from second-hand parts has meant chassis that never quite fit, backplanes built for someone else's server, and cables in the wrong standard. Rather than keep compromising, we are designing the boards that tie the system together ourselves: from the host board, through power distribution, to the storage backplanes.
The result will run the neural-network research that is the reason the company needs the machine in the first place. Build-A-Board is the next step in The Meta Groupe's evolution: from writing the software to owning the hardware it runs on.
Why build boards at all
Second-hand server parts fail the same way every time.
Assembling an AI box from used enterprise gear is a gamble on parts that were never meant to meet. These are the failures Build-A-Board exists to end.
- Used GPUs with unknown thermal history and no warranty.
- OEM backplanes designed for one specific chassis, with proprietary connectors, pinouts, and management buses that are undocumented outside the vendor.
- Cable roulette across the SFF-8087, SFF-8643, SFF-8654, and SFF-TA-1016 variants.
- A chassis whose drive cage, power-supply cutout, and board standoffs never quite agree.
Buy the commodity parts new and to a known spec: CPU, memory, GPUs, drives, power supplies, cables. Design only the boards that tie them together, so they fit the first time.
The board family
Six boards, one machine.
Each board is designed to be built, tested, and put into service on its own.
SAS backplane
3.5-inch and 2.5-inch SAS and SATA bays, with an optional expander, to a host bus adapter.
Front panel
Power and reset, status LEDs, USB, and drive-activity indicators. The first board to be fabricated.
Power distribution
Hot-plug power-supply sockets, a 12-volt bus, and PMBus monitoring.
PCIe and GPU midplane
Eight dual-slot x16 slots, with optional PCI Express switches.
Host board
A two-socket server host with 24 DIMM slots, six x16 PCI Express links on MCIO cables, and DC-SCM management. A research track until the CPU platform is settled.
How we are building it
Four rules, applied to every board.
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Standard where a standard exists.
SNIA SFF connectors, PCI-SIG add-in-card mechanicals, SSI, ATX and EEB board outlines, ATX and EPS12V power. We design only what the standards leave to the integrator: the backplane, the panel, the harness. A custom interface needs a written decision naming the standard it rejects and why.
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Cheapest board first.
Backplanes and the front panel are two- to eight-layer boards a standard fab will build for tens to low hundreds of dollars per revision. Fail there, and learn there, before spending on the host board.
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Documented over clever.
A board nobody can bring up from the repository alone is not done. Every board carries its own requirements, bill of materials, bring-up notes, and changelog.
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No fabricated facts.
No part number, pinout, or electrical value enters a design without a cited datasheet or specification. Until it has one, it is marked as an assumption.
Delivery order
Staged on purpose.
The four board types differ in difficulty by two orders of magnitude, so the programme is ordered so that each stage teaches the next.
- 1
Front panel
The first fabrication. A two-layer board that exercises the whole process, from requirements and review to release and bring-up, on a board that cannot hurt much.
- 2
NVMe and SAS backplanes
The boards that solve the actual integration problem. They use standard host-side connectors, so they work with a purchased host board as well as our own.
- 3
Host board
A research track until the CPU platform is chosen. A current-generation server board is a 16-to-24-layer design with vendor reference material behind non-disclosure agreements and signal-integrity simulation on every high-speed lane. The realistic paths, to be settled in their own decision record, range from full custom, to a carrier board for a compute module, to adopting an open reference design.
Where the programme stands today: the target machine is specified, the architecture and the decisions behind it are written down, and each board is being taken through requirements before its first schematic.
Building something similar?
We are happy to compare notes on backplanes, standards, and the used-parts trap.
[email protected]